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Design and Verification engineer Intern

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Company/Organization: Infosemi Technologies Pvt Ltd


During this internship you will be part of a team doing following state of the art project:

Project: Generic Micro controller design and verification using System Verilog language having an 8 bit CPU and AES, CRC, SPI, UART, DMA Controller, Timer, RAM Controller, WDOG and GPIO blocks. This project is done for the low power application specific ICs.

You can avail the opportunity of working with ARM based AMBA - AHB/AXI and USB 3.0 VIP team by enrolling before October 15,2013

You will involved in the following activities:

1. Specification Development
2. Micro-Architecture Development
3. Test guide
4. Test plan
5. Presentation
6. RTL Design using Verilog language
7. Testbench design using System Verilog language
8. Testcase design using System Verilog at block level
9. Coverage analysis
10. Power Analysis and improvement
11. Synthesis
12. Timing analysis
13. SOC Integration
14. SOC System level verification
15. SOC Sign off

You will learn complete flow of SOC design while doing this project.

Project Duration : 6 Months

Project Office Timings: 9:00 AM to 6:00 PM ( 5 Days a week)

All Interns will get:
1. Company atmosphere
2. Opportunity to work directly with 14+ Yrs VLSI experts
3. Opportunity to get placed in Incise Design Services after completion of Internship
4. Learn from the best to become the best in the top career domain for EC engineers
5. Learn the complete SOC development cycle
6. Get the experience letter from registered company Incise Infotech
7. Get interview opportunities with the Incise partner companies

PS: Paid shared accommodation can be arranged for students on request.


BE/ Btech- ECE/EEE branch with aggregate 65 % .

Knowledge of HDLs will be a plus.

knowledge of digital electronics, Microprocessor and C

VLSI  Jobs    electronics  jobs    summer  training    6-months  training 
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